School Of Advanced Engineering, UPES, Dehradun
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M.Tech VLSI Design and Embedded Systems at SOA University Offline Course
24 Months
Full timeQuick Facts
Exam GATE |
Course Details
MODE
Full timeDURATION
24 MonthsMaster of Technology in VLSI Design and Embedded Systems is two years (4 Semester) full-time postgraduate engineering program offered by Siksha O' Anusandhan University, Bhubaneshwar.
Important dates
| Exams and Events | Dates |
|---|
GATE Application Date - Without late fee (Mode - Online) | 1 Sep'26 - 27 Sep'26 |
GATE Late Fee Application Date - With late fee (Mode - Online) | 4 Oct'26 - 4 Oct'26 |
GATE Application Correction Date (Mode - Online) | 13 Oct'26 - 20 Oct'26 |
GATE Choice of Exam City - City allotment (Mode - Online) | 3 Jan'27 - 3 Jan'27 |
GATE Exam Date (Mode - Online) | 5 Feb'27 - 6 Feb'27 |
GATE Exam Date (Mode - Online) | 12 Feb'27 - 13 Feb'27 |
GATE Exam Date (Mode - Online) | 19 Feb'27 - 20 Feb'27 |
GATE Result Date (Mode - Online) | 18 Mar'27 - 18 Mar'27 |
Eligibility Criteria
Passed B.Tech. or equivalent in the relevant field. Obtained at least 60% marks (50% in case of candidate belongs to reserved category) in the qualifying Examination or passed M.Sc. (Electronics) and 50% marks (45% marks in case of candidate belongs to SC / ST / OBC category) at 10+2 or equivalent examination.
Admission Details
Admission into M.Tech. programmes will be done on the basis of performance in SAAT or valid GATE score.
Top Exams Accepted by SOA University
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