Amity University Noida B.Tech Admissions 2026
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Quick Facts
Exam GATE | Seats 22 |
Course Details
MODE
Full timeDURATION
24 MonthsMaster of Technology (M.Tech) in VLSI Design and Embedded System under the Department of Electronics and Communication Engineering is a two-year (4 Semesters)full-time postgraduate program offered by National Institute of Technology Arunachal Pradesh.
Important dates
| Exams and Events | Dates |
|---|
GATE Application Date - Without late fee (Mode - Online) | 27 Aug'25 - 28 Sep'25 |
GATE Late Fee Application Date - With late fee (Mode - Online) | 28 Sep'25 - 9 Oct'25 |
GATE Score Card Date - Availability of Score Cards for download by paying a fee of Rs. 500 per test paper (Mode - Online) | 31 May'25 - 30 Dec'25 |
GATE Exam Date (Mode - Online) | 6 Feb'26 - 7 Feb'26 |
GATE Exam Date (Mode - Online) | 13 Feb'26 - 14 Feb'26 |
GATE Result Date (Mode - Online) | 18 Mar'26 - 18 Mar'26 |
Eligibility Criteria
Minimum CGPA of 6.5 or 60% of marks or First Class in the qualifying degree, fulfilling specific requirements for different disciplines, as indicated below.
VLSI and Embedded Systems: Bachelor ’s degree in Electronics & Communication Engineering/Computer Science & Engineering or Equivalent or MSc(Electronics) and a valid GATE score in Electronics & Communication, Computer Science & Information Technology or Physics.
Admission Details
Admission to all categories of students is granted on the basis of GATE Score/ counseling/interview/admission test held usually during the month of May -July every year.
Top Exams Accepted by NIT Arunachal Pradesh
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News and Notifications
7 days ago :
JEE Main 2026 exam will be conducted on January 21-30, 2025 for BTech admissions.
7 days ago :
GATE 2026 exam for MTech admissions will be held on February 7, 8, 14, and 15, 2026.
7 days ago :
NIT Arunachal Pradesh secured its position in the 101-150th rank band in engineering by NIRF ranking 2025.