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Quick Facts

Total Fees
3.16 L
Exam
GATE

Fees Details

General

3.16 L

Disclaimer: Data for total fees has been calculated based on all years/semesters as provided by the college. The actual fees may vary.

Course Details

MODE

Full time

DURATION

24 Months

Master of Technology (M.Tech) Electronics and Communication Engineering in VLSI and Embedded Systems is a two-year full-time postgraduate program offered by the Sir Padampat Singhania University, Udaipur


Important dates

Exams and EventsDates
GATE
Exam Date (Mode - Online)
6 Feb'26 - 7 Feb'26
GATE
Exam Date (Mode - Online)
13 Feb'26 - 14 Feb'26
GATE
Result Date (Mode - Online)
18 Mar'26 - 18 Mar'26

Eligibility Criteria

  • Passed or appeared for final year examination of Bachelor's degree in the relevant field of Engineering and Technology from a University recognized by UGC, with at least 50% marks.

Admission Details

  • Candidate must have qualified GATE 2025 or SPSAT 2025.

Applications for Admissions are open.

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Last Date to Apply: 26th March | Ranked #43 among Engineering colleges in India by NIRF | Highest Package 1.3 CR , 100% Placements

University of Bristol, Mumbai Enterprise Campus
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Bristol's expertise meets Mumbai's innovation. Admissions open for UG & PG programmes

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