Total Fees 1.00 L | Exam GATE | Seats 12 |
₹ 1.00 L
MODE
Full timeDURATION
24 MonthsMaster of Technology in VLSI Design and Embedded Systems is a full-time two-year course degree offered by Jawaharlal Nehru Technological University, Kakinada and approved by AICTE.
Exams and Events | Dates |
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GATE Score Card Date (Mode - Online) | 22 Mar'24 - 30 May'24 |
GATE Score Card Date - Score cards available for download by paying a fee of Rs. 500 per test paper (Mode - Online) | 31 May'24 - 30 Dec'24 |
AP PGECET Application Date - Online application with late fee Rs. 500 (Mode - Online) | 20 Apr'24 - 27 Apr'24 |
AP PGECET Application Date - Online application with late fee Rs. 2000 (Mode - Online) | 28 Apr'24 - 4 May'24 |
AP PGECET Application Date - Online application with late fee Rs. 5000 (Mode - Online) | 5 May'24 - 11 May'24 |
AP PGECET Application Correction Date (Mode - Online) | 7 May'24 - 13 May'24 |
AP PGECET Admit Card Date (Mode - Online) | 21 May'24 - 30 May'24 |
AP PGECET Exam Date (Mode - Online) | 28 May'24 - 30 May'24 |
AP PGECET Answer Key Date - Preliminary (Mode - Online) | 30 May'24 - 1 Jun'24 |
AP PGECET Answer Key Date - Objections on preliminary (Mode - Online) | 1 Jun'24 - 3 Jun'24 |
AP PGECET Others - Rank (Mode - Online) | 7 Jun'24 |
Admission is based on the GATE/AP-PGECET Entrance Exam.