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M.Tech System on Chip Design at IIT Palakkad Offline Course
24 Months
Full time
61,680Quick Facts
Total Fees 61.68 K | Exam GATE | Seats 17 |
Fees Details
General
₹ 61.68 K
Disclaimer: Data for total fees has been calculated based on all years/semesters as provided by the college. The actual fees may vary.
Course Details
MODE
Full timeDURATION
24 MonthsMaster of Technology in System-on-Chip-Design is a two years full-time course offered by the Indian Institute of Technology, Palakkad.
Important dates
| Exams and Events | Dates |
|---|
GATE Application Date - Without late fee (Mode - Online) | 1 Sep'26 - 27 Sep'26 |
GATE Late Fee Application Date - With late fee (Mode - Online) | 4 Oct'26 - 4 Oct'26 |
GATE Application Correction Date (Mode - Online) | 13 Oct'26 - 20 Oct'26 |
GATE Choice of Exam City - City allotment (Mode - Online) | 3 Jan'27 - 3 Jan'27 |
GATE Exam Date (Mode - Online) | 5 Feb'27 - 6 Feb'27 |
GATE Exam Date (Mode - Online) | 12 Feb'27 - 13 Feb'27 |
GATE Exam Date (Mode - Online) | 19 Feb'27 - 20 Feb'27 |
GATE Result Date (Mode - Online) | 18 Mar'27 - 18 Mar'27 |
Eligibility Criteria
(i) Bachelor’s degree** in Engineering / Technology from educational Institutions approved by AICTE/ Government of India.
(ii) Degrees obtained through Distance Education/ correspondence mode for the qualifying degree.
(iii) Associate Membership holders of professional bodies for admission into their parent disciplines.
Admission Details
The Selection based on GATE entrance exam.
Top Exams Accepted by IIT Palakkad
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