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    Quick Facts

    Total Fees
    2.99 L
    Exam
    GATE
    Seats
    6

    Fees Details

    General

    ₹ 2.99 L

    Disclaimer: Data for total fees has been calculated based on all years/semesters as provided by the college. The actual fees may vary.

    Course Details

    MODE

    Full time

    DURATION

    24 Months

    Master of Engineering (ME) in Electronics and Communication Engineering Embedded System and VLSI is a two-year full-time postgraduate program recognized by the All India Council for Technical Education (AICTE) and offered by the Manav Rachna University, Faridabad.

    Electronics and Communication Engineering offers an M.Tech program in Electronics and Communication Engineering with a specialization in VLSI and Embedded Systems in association with Truechip. The program is designed to provide students with in-depth knowledge and skills in the field of VLSI and Embedded Systems.

    The program curriculum includes courses such as Advanced Digital Design, Low-Power VLSI Design, System-on-Chip Design, and Embedded Systems Design. Students also have the opportunity to participate in projects and internships to gain practical experience in the field.

    Truechip, the program’s industry partner, provides students with access to industry-standard tools and technologies, training, and industry-expert interaction. This collaboration enhances students’ employability and equips them with the necessary skills to meet industry demands.

    The M.Tech program in Electronics and Communication Engineering with a specialization in VLSI and Embedded Systems in association with Truechip at MRU is an excellent choice for students seeking to advance their careers in this field.


    Important dates

    Exams and EventsDates
    GATE
    Application Date - Without late fee (Mode - Online)
    1 Sep'26 - 27 Sep'26
    GATE
    Late Fee Application Date - With late fee (Mode - Online)
    4 Oct'26 - 4 Oct'26
    GATE
    Application Correction Date (Mode - Online)
    13 Oct'26 - 20 Oct'26
    GATE
    Choice of Exam City - City allotment (Mode - Online)
    3 Jan'27 - 3 Jan'27
    GATE
    Exam Date (Mode - Online)
    5 Feb'27 - 6 Feb'27
    GATE
    Exam Date (Mode - Online)
    12 Feb'27 - 13 Feb'27
    GATE
    Exam Date (Mode - Online)
    19 Feb'27 - 20 Feb'27
    GATE
    Result Date (Mode - Online)
    18 Mar'27 - 18 Mar'27

    Eligibility Criteria

    Minimum 50% marks or equivalent CGPA in B.E./B.Tech in Electronics  & Communication Engg./ Telecommunication Engg./  Computer Science & Engineering/ Instrumentation & Control Engg./ Electrical & Electronics Engg./ Electrical Engg./ Power Electronics or/ MCA or M.Sc Computer Science/ Information Technology/ Electronics/Physics/ Mathematics as one of the subjects.

    Admission Details

    • Candidates are shortlisted based on their performance in MRNAT or the qualifying examination.
    • Candidates will be shortlisted based on their performance in MRNAT or the qualifying examination.

    Top Exams Accepted by School of Engineering, Manav Rachna University, Faridabad

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