GMRIT Deemed to be University B.Tech Admissions 2026
Apply100+ Recruiters | 1200+ Placements of 2026 Batch | NBA & NAAC Accredited | Highest CTC 37 LPA
Total Fees 3.20 L | Exam GATE |
₹ 3.20 L
MODE
Full timeDURATION
24 MonthsThe industry relevance and demand for professionals skilled in VLSI Design are substantial. M.Tech. in VLSI Design Program at PDEU will enrich the students with the expertise and skills needed to navigate the semiconductor technology. As currently there is shortage of the trained manpower in the field of VLSI, the program aims at providing the skilled and trained individuals to the VLSI industry. The PG programme in “VLSI Design” is in line with the Gujarat Semiconductor Policy, Government of Gujarat, and the India Semiconductor Mission (ISM), Ministry of Electronics & Information Technology (MEITY), Government of India (GoI).
| Particulars | Fees (In Rs.) |
| Tuition fees (Per Semester) | 75,000/-** |
| Library deposit (One time-refundable) | 3,000/- |
| University Enrolment & Examination fees( Per Semester) | 5,000/- |
| Security deposit (One time-refundable) | 10,000/- |
| Total Fees (inclusive of Rs. 13,000 as refundable deposits) | 93,000/- |
| Total Fees for two year program | 3,33,000/- |
| **Under revision by Fee Regulatory Committee, Govt. of Gujarat. Other incidental fees shall be charged from time to time. | |
| Exams and Events | Dates |
|---|
GATE Application Date - Without late fee (Mode - Online) | 1 Sep'26 - 27 Sep'26 |
GATE Late Fee Application Date - With late fee (Mode - Online) | 4 Oct'26 - 4 Oct'26 |
GATE Application Correction Date (Mode - Online) | 13 Oct'26 - 20 Oct'26 |
GATE Choice of Exam City - City allotment (Mode - Online) | 3 Jan'27 - 3 Jan'27 |
GATE Exam Date (Mode - Online) | 5 Feb'27 - 6 Feb'27 |
GATE Exam Date (Mode - Online) | 12 Feb'27 - 13 Feb'27 |
GATE Exam Date (Mode - Online) | 19 Feb'27 - 20 Feb'27 |
GATE Result Date (Mode - Online) | 18 Mar'27 - 18 Mar'27 |
Eligibility Criteria:
• B.E./B.Tech. in Electronics Engineering
• B.E./B.Tech. in Electronics and Communication Engineering
• B.E./B.Tech. in Electronics and Telecommunication Engineering
• B.E./B.Tech. in Electrical and Electronics Engineering
• B.E./B.Tech. in Electrical Engineering
• B.E./B.Tech. in Instrumentation Engineering
• B.E./B.Tech. in Information and Communication Technology
• B.E./B.Tech. in Electrical and Instrumentation Engineering
• B.E./B.Tech. in Mechatronics Engineering
• M.Sc. in Electronics
A. 33% – Government Seats (Filled by ACPC)
For the purpose of admission to Gujarat Seats, a candidate has to apply at ACPC as per ACPC norms.
B. 67% – All India Seats (Filled by PDEU)
The admission process will be conducted by PDEU in two Rounds, (1) Early M.Tech. Admissions and (2) Regular M.Tech. Admissions. A candidate seeking admission to All India Seats shall apply online on the University website (www.pdeu.ac.in.) within the prescribed time limit. Admission form filled for Early M.Tech. Admissions will also be considered for Regular M.Tech. Admissions.
Phase 1: 50% Seats (GATE)
Admission is offered to the candidates on merit based on the GATE score
Phase 2: 50% Seats (Non-GATE)
Admission process is meant for Non-GATE candidates and also for the candidates having the valid and qualified GATE score but not offered the admission during Phase - I.
Admissions are offered as per merit prepared based on the scores obtained in Personal Interview.
100+ Recruiters | 1200+ Placements of 2026 Batch | NBA & NAAC Accredited | Highest CTC 37 LPA
NAAC A++ Grade | Recognized as Category-1 Deemed to be University by UGC | 41,000 + Alumni Imprints Globally
NAAC A+ Accredited | Highest CTC 45 LPA | Scholarships Available
NAAC A++ Grade | Highest Package-30 LPA | 400+ Recruiters
NAAC A+ Accredited | Highest CTC 45 LPA | Scholarships Available
Campuses in Ropar, Agartala, Aizawl, Ajmer, Aurangabad, Calicut, Imphal, Itanagar, Kohima, Gorakhpur, Patna & Srinagar
On August 24, 2026, PDEU hosted a 1-day international partnership-building platform, SEQUENCE 2026.