Total Fees 1.18 L | Exam GATE | Seats 18 |
₹ 1.18 L
MODE
Full timeDURATION
24 MonthsMaster of Technology in (Electronics & Communication Engineering) VLSI Design is a two-year full-time course offered by Deenbandhu Chhotu Ram University of Science and Technology, Murthal.
Exams and Events | Dates |
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GATE Score Card Date (Mode - Online) | 22 Mar'24 - 30 May'24 |
GATE Score Card Date - Score cards available for download by paying a fee of Rs. 500 per test paper (Mode - Online) | 31 May'24 - 30 Dec'24 |
The candidate should have a degree in B.E./B.Tech or equivalent in Electronics Engineering / Electronics and Instrumentation Control/ Instrumentation and Control/ Electronics and Communication Engg./Electronics and Telecommunication Engg./Electronics Instt. and Control/Electrical and Electronics Engg./ Instrumentation Engg./M.Sc. (Electronics) scoring at least 50% (47.50% for SC/PH) marks in aggregate.
Candidates with valid GATE score need not to appear in the entrance test for M.Tech.