Total Fees 1.28 L | Exam GATE | Seats 18 |
₹ 1.28 L
MODE
Full timeDURATION
24 MonthsMaster of Technology in (Electronics & Communication Engineering) VLSI Design is a two-year full-time course offered by Deenbandhu Chhotu Ram University of Science and Technology, Murthal.
| Exams and Events | Dates |
|---|
GATE Exam Date (Mode - Online) | 6 Feb'26 - 7 Feb'26 |
GATE Exam Date (Mode - Online) | 13 Feb'26 - 14 Feb'26 |
GATE Result Date (Mode - Online) | 18 Mar'26 - 18 Mar'26 |
The candidate should have a degree in B.E./B.Tech or equivalent in Electronics Engineering / Electronics and Instrumentation Control/ Instrumentation and Control/ Electronics and Communication Engg./Electronics and Telecommunication Engg./Electronics Instt. and Control/Electrical and Electronics Engg./ Instrumentation Engg./M.Sc. (Electronics) scoring at least 50% (47.50% for SC/PH) marks in aggregate.
Candidates with valid GATE score need not to appear in the entrance test for M.Tech.