UPES B.Tech Admissions 2024
ApplyRanked #52 among universities in India by NIRF | Highest CTC 50 LPA | 100% Placements | Last date to apply: 24th April
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Quick Facts
Total Fees 1.20 L | Exam TSICET | Seats 18 |
Fees Details
General
₹ 1.20 L
Disclaimer: Data for total fees has been calculated based on all years/semesters as provided by the college. The actual fees may vary.
Course Details
MODE
Full timeDURATION
24 MonthsMaster of Technology (M.Tech) in Embedded System and VLSI is a two-year full-time postgraduate program recognized by the All India Council for Technical Education (AICTE) and offered by Jawaharlal Nehru Technological University, Hyderabad.
Important dates
| Exams and Events | Dates |
|---|
TSICET Application Date (Mode - Online) | 6 Mar'24 - 29 Apr'24 |
TSICET Late Fee Application Date - With late fee of Rs 250 (Mode - Online) | 30 Apr'24 - 16 May'24 |
TSICET Application Correction Date (Mode - Online) | 16 May'24 - 19 May'24 |
TSICET Late Fee Application Date - With late fee of Rs 500 (Mode - Online) | 17 May'24 - 26 May'24 |
TSICET Admit Card Date (Mode - Online) | 27 May'24 - 5 Jun'24 |
TSICET Exam Date (Mode - Online) | 4 Jun'24 - 5 Jun'24 |
TSICET Answer Key Date - Preliminary (Mode - Online) | 14 Jun'24 - 14 Jun'24 |
TSICET Answer Key Date - Objection window of preliminary key (Mode - Online) | 15 Jun'24 - 18 Jun'24 |
TSICET Result Date (Mode - Online) | 27 Jun'24 - 27 Jun'24 |
TSICET Answer Key Date - Final (Mode - Online) | 27 Jun'24 - 27 Jun'24 |
Eligibility Criteria
The minimum qualification for admission to the first year of the MBA is a pass in the undergraduate course (10 + 2 + 3).
Admission Details
70 % of the seats are allotted based on the merit in the TSICET.
30 % of the seats are earmarked for Management/NRI candidates.
Top Exams Accepted by NNRG Hyderabad
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News and Notifications
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