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Quick Facts

Total Fees
1.87 L
Exam
GATE
Seats
18

Fees Details

General

1.87 L

SC

45.33 K

ST

45.33 K

OBC

1.87 L

Disclaimer: Data for total fees has been calculated based on all years/semesters as provided by the college. The actual fees may vary.

Course Details

MODE

Full time

DURATION

24 Months

Master of Technology (M.Tech) in Embedded System and VLSI Design is a two-year full-time postgraduate program recognized by the All India Council for Technical Education (AICTE) and offered by the Swami Ramanand Teerth Marathwada University, Nanded.


Important dates

Exams and EventsDates
GATE
Exam Date - Test Paper - AR, CY, DA, ES, PI, GE, ME, PH (Mode - Online)
2 Feb'24 - 2 Feb'24
GATE
Exam Date - Test Paper - BM, CE1, CH, EY, GG, XH, CE2, IN, MA, MN, PE (Mode - Online)
3 Feb'24 - 3 Feb'24
GATE
Exam Date - Test Paper - AE, AG, BT, CS1, MT, NM, TF, CS2, ST, XE, XL (Mode - Online)
9 Feb'24 - 9 Feb'24
GATE
Exam Date - Test Paper - EC, EE (Mode - Online)
10 Feb'24 - 10 Feb'24
GATE
Others - Candidates response sheet (Mode - Online)
15 Feb'24
GATE
Answer Key Date (Mode - Online)
20 Feb'24 - 20 Feb'24
GATE
Answer Key Date - Submission of challenge (Mode - Online)
21 Feb'24 - 24 Feb'24
GATE
Result Date (Mode - Online)
15 Mar'24 - 15 Mar'24
GATE
Score Card Date (Mode - Online)
22 Mar'24 - 30 May'24
GATE
Score Card Date - Score cards available for download by paying a fee of Rs. 500 per test paper (Mode - Online)
31 May'24 - 30 Dec'24

Eligibility Criteria

Passed Bachelor’s Degree or equivalent in the relevant field. Obtained at least 50% marks (45% marks in case of candidates belonging to reserved category) in the qualifying Examination.

Admission Details

Admission to the M.tech program in SGGS IE&T Nanded is done through the GATE score. The admission process is organized by DTE Maharashtra through a centralized admission process (CAP). The authorities will release a merit list of candidates based on their GATE scores.  

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