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M.Tech VLSI at BIET Ibrahimpatnam Offline Course
Approved by AICTE
24 Months
Full timeQuick Facts
Exam GATE | Seats 18 |
Course Details
MODE
Full timeDURATION
24 MonthsMaster of Technology (M.Tech) in VLSI Design is a two-year full-time postgraduate program recognized by the All India Council for Technical Education (AICTE) and offered by the Jawaharlal Nehru Technological University, Hyderabad.
Important dates
| Exams and Events | Dates |
|---|
GATE Application Date - Without late fee (Mode - Online) | 1 Sep'26 - 27 Sep'26 |
GATE Late Fee Application Date - With late fee (Mode - Online) | 4 Oct'26 - 4 Oct'26 |
GATE Application Correction Date (Mode - Online) | 13 Oct'26 - 20 Oct'26 |
GATE Choice of Exam City - City allotment (Mode - Online) | 3 Jan'27 - 3 Jan'27 |
GATE Exam Date (Mode - Online) | 5 Feb'27 - 6 Feb'27 |
GATE Exam Date (Mode - Online) | 12 Feb'27 - 13 Feb'27 |
GATE Exam Date (Mode - Online) | 19 Feb'27 - 20 Feb'27 |
GATE Result Date (Mode - Online) | 18 Mar'27 - 18 Mar'27 |
TS PGECET Counselling Date - Phase 2 & Final Phase: Reporting at concerned colleges for verification of original certificates along with tuition fee payment receipt (M.E./ M. Tech./ M. Arch) (Mode - Online) | 8 Sep'26 - 11 Sep'26 |
Eligibility Criteria
B.E / B.Tech in Electronics and Communications Engineering / Computer Science and Engineering / Information Technology / Electronics and Instrumentation Engineering with a valid GATE score / based on the rank obtained in the test conducted by JNTUH.
Admission Details
Admissions to the College are made along with the other Engineering Colleges in the state through a common entrance test (PGECET/GATE)
Top Exams Accepted by BIET Ibrahimpatnam
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Applications for Admissions are open.
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