UPES B.Tech Admissions 2026
ApplyRanked #43 among Engineering colleges in India by NIRF | Highest Package 1.3 CR , 100% Placements
Total Fees 2.31 L | Exam GATE | Seats 40 |
₹ 2.31 L
MODE
Full timeDURATION
24 MonthsMaster of Technology (M.Tech) in VLSI Design is a two-year (4 semesters) full-time postgraduate program offered by the School of VLSI Design and Embedded Systems-(VL) at the National Institute of Technology Kurukshetra.
| Exams and Events | Dates |
|---|
GATE Score Card Date - Availability of Score Cards for download by paying a fee of Rs. 500 per test paper (Mode - Online) | 31 May'25 - 30 Dec'25 |
GATE Exam Date (Mode - Online) | 6 Feb'26 - 7 Feb'26 |
GATE Exam Date (Mode - Online) | 13 Feb'26 - 14 Feb'26 |
GATE Result Date (Mode - Online) | 18 Mar'26 - 18 Mar'26 |
For a candidate to be eligible for M.Tech. programme:
Admission to M.Tech. degree courses are made on the basis of candidate's score in the GATE examination. Seats are first filled up by admitting GATE qualified candidates and then by Industry sponsored Candidates.
The classroom is very well maintained, with availability of Wi-Fi and labs in our department. The infrastructure of our classroom is very good and clean. The quality of food is not as good. There is a big sports ground in our college where you can run.
Ranked #43 among Engineering colleges in India by NIRF | Highest Package 1.3 CR , 100% Placements
Among top 100 Universities Globally in the Times Higher Education (THE) Interdisciplinary Science Rankings 2026
Among top 100 Universities Globally in the Times Higher Education (THE) Interdisciplinary Science Rankings 2026
Recognized as Institute of Eminence by Govt. of India | NAAC ‘A++’ Grade | Upto 75% Scholarships
Hands on Mentoring and Code Coaching | Cutting Edge Curriculum with Real World Application
Ranked #45 Among Universities in India by NIRF | 1950+ Students Placed 91% Placement, 800+ Recruiters
JEE Main 2026 examination will be conducted from January 21-30, 2026.
CAT 2025 examination was conducted on November 30, 2025.