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M.Tech VLSI System Design at AITS Kadapa Offline Course
Approved by AICTE
24 Months
Full time
86,000Quick Facts
Total Fees 86.00 K | Exam GATE | Seats 12 |
Fees Details
General
₹ 86.00 K
Disclaimer: Data for total fees has been calculated based on all years/semesters as provided by the college. The actual fees may vary.
Course Details
MODE
Full timeDURATION
24 MonthsMaster of Technology (M.Tech) VLSI System Design is a full-time two-year duration course affiliated to Jawaharlal Nehru Technological University, Anantapur Approved by AICTE.
Important dates
| Exams and Events | Dates |
|---|
GATE Application Date - Without late fee (Mode - Online) | 1 Sep'26 - 27 Sep'26 |
GATE Late Fee Application Date - With late fee (Mode - Online) | 4 Oct'26 - 4 Oct'26 |
GATE Application Correction Date (Mode - Online) | 13 Oct'26 - 20 Oct'26 |
GATE Choice of Exam City - City allotment (Mode - Online) | 3 Jan'27 - 3 Jan'27 |
GATE Exam Date (Mode - Online) | 5 Feb'27 - 6 Feb'27 |
GATE Exam Date (Mode - Online) | 12 Feb'27 - 13 Feb'27 |
GATE Exam Date (Mode - Online) | 19 Feb'27 - 20 Feb'27 |
GATE Result Date (Mode - Online) | 18 Mar'27 - 18 Mar'27 |
Eligibility Criteria
Passed Bachelor’s Degree or equivalent in the relevant field. Obtained at least 50% marks (45% marks in case of candidates belonging to reserved category) in the qualifying Examination.
Admission Details
As per the existing stipulations of AP State Council for Higher Education (APSCHE), Government of Andhra Pradesh, admissions are made as follows:
Category-A seats are to be filled by the Convener, PGECET based on GATE/PGECET score.
Category-B seats are to be filled by Management as per the norms stipulated by Government of A.P
Top Exams Accepted by AITS Kadapa
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