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    Quick Facts

    Total Fees
    1.23 L
    Exam
    GATE
    Seats
    12

    Fees Details

    General

    1.23 L

    Disclaimer: Data for total fees has been calculated based on all years/semesters as provided by the college. The actual fees may vary.

    Course Details

    MODE

    Full time

    DURATION

    24 Months

    Master of Technology (M.Tech) in VLSI and Embedded Systems is a two-year full-time postgraduate program recognized by the All India Council for Technical Education (AICTE) and offered by the Jawaharlal Nehru Technological University, Hyderabad.


    Important dates

    Exams and EventsDates
    GATE
    Application Date - Without late fee (Mode - Online)
    1 Sep'26 - 27 Sep'26
    GATE
    Late Fee Application Date - With late fee (Mode - Online)
    4 Oct'26 - 4 Oct'26
    GATE
    Application Correction Date (Mode - Online)
    13 Oct'26 - 20 Oct'26
    GATE
    Choice of Exam City - City allotment (Mode - Online)
    3 Jan'27 - 3 Jan'27
    GATE
    Exam Date (Mode - Online)
    5 Feb'27 - 6 Feb'27
    GATE
    Exam Date (Mode - Online)
    12 Feb'27 - 13 Feb'27
    GATE
    Exam Date (Mode - Online)
    19 Feb'27 - 20 Feb'27
    GATE
    Result Date (Mode - Online)
    18 Mar'27 - 18 Mar'27
    TS PGECET
    Counselling Date - Phase 2 & Final Phase: Reporting at concerned colleges for verification of original certificates along with tuition fee payment receipt (M.E./ M. Tech./ M. Arch) (Mode - Online)
    8 Sep'26 - 11 Sep'26

    Eligibility Criteria

    Passed Bachelor’s Degree or equivalent in the relevant field. Obtained at least 50% marks (45% marks in case of candidates belonging to reserved category) in the qualifying Examination.

    Admission Details

    Category-A: 70% of the seats are allotted to meritorious students based on their rank obtained in PGECET. Preference is given to candidates qualified in GATE.
    Category-B: 30% of the seats are earmarked for other eligible candidates.

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