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    Quick Facts

    Total Fees
    3.80 L
    Exam
    GATE
    Seats
    18

    Fees Details

    General

    3.80 L

    Disclaimer: Data for total fees has been calculated based on all years/semesters as provided by the college. The actual fees may vary.

    Course Details

    MODE

    Full time

    DURATION

    24 Months

    Master of Technology in Embedded System and VLSI Design is two years (4 Semester) full-time postgraduate engineering program offered by Jain University, Bangalore and approved by AICTE.


    Important dates

    Exams and EventsDates
    GATE
    Counselling Date - COAP Seat allotment (Round-6) (Mode - Online)
    12 Jun'26 - 16 Jun'26
    GATE
    Counselling Date - COAP Seat allotment (Round-7) (Mode - Online)
    19 Jun'26 - 22 Jun'26
    GATE
    Counselling Date - COAP Seat allotment (Round-8) (Mode - Online)
    26 Jun'26 - 30 Jun'26
    GATE
    Counselling Date - COAP Seat allotment (Round-9) (Mode - Online)
    3 Jul'26 - 4 Jul'26
    GATE
    Counselling Date - COAP Seat allotment (Round-10) (Mode - Online)
    10 Jul'26 - 11 Jul'26

    Eligibility Criteria

    Candidates who have passed the BE / B.Tech with an aggregate of 50% of all the years/semesters are eligible to apply. (45% in the qualifying examination in case of SC, ST).

    GATE, JET or any valid entrance score is preferred.

    Embedded Systems Technologies - B.E. or B.Tech or AMIE in Electronics and Communication Engineering / Electrical and Electronics Engineering / Electronics and Instrumentation Engineering / Instrumentation and Control Engineering / Electronics and Telecommunication Engineering / Computer Science Engineering / Information Science Engineering / Medical Electronics Engineering.

    Admission Details

    Students will be selected on the basis of:

    • Jain Entrance Test (JET) and Personal Interview.
    • GATE appeared candidates will be exempted from Entrance Test.
    • Candidates with a valid test score of any State Level Entrance are exempted from JET.

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