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M.Tech VLSI Design at RGMCET Kurnool Offline Course
Approved by AICTE
24 Months
Full time
1,00,000Quick Facts
Total Fees 1.00 L | Exam GATE | Seats 9 |
Fees Details
General
₹ 1.00 L
Disclaimer: Data for total fees has been calculated based on all years/semesters as provided by the college. The actual fees may vary.
Course Details
MODE
Full timeDURATION
24 MonthsMaster of Technology (M.Tech) in VLSI Design is a two-year full-time postgraduate Course offered by Rajeev Gandhi Memorial College of Engineering and Technology, Kurnool recognized by All India Council for Technical Education (AICTE) and affiliated to Jawaharlal Nehru Technological University, Anantapur.
Important dates
| Exams and Events | Dates |
|---|
GATE Application Date - Without late fee (Mode - Online) | 1 Sep'26 - 27 Sep'26 |
GATE Late Fee Application Date - With late fee (Mode - Online) | 4 Oct'26 - 4 Oct'26 |
GATE Application Correction Date (Mode - Online) | 13 Oct'26 - 20 Oct'26 |
GATE Choice of Exam City - City allotment (Mode - Online) | 3 Jan'27 - 3 Jan'27 |
GATE Exam Date (Mode - Online) | 5 Feb'27 - 6 Feb'27 |
GATE Exam Date (Mode - Online) | 12 Feb'27 - 13 Feb'27 |
GATE Exam Date (Mode - Online) | 19 Feb'27 - 20 Feb'27 |
GATE Result Date (Mode - Online) | 18 Mar'27 - 18 Mar'27 |
Eligibility Criteria
Passed Bachelor’s Degree or equivalent in the relevant field. Obtained at least 50% marks (45% marks in case of candidates belonging to reserved category) in the qualifying Examination.
Admission Details
Admissions into the PG Programmes in the college are based on the merit / ranks / scores of candidates in the national eligibility test GATE and PGECET, conducted state wide. For filling up the category-B seats in the PG programmes, the procedures prescribed by the APSCHE, for admissions into self-financing institutions, are followed.
Top Exams Accepted by RGMCET Kurnool
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Applications for Admissions are open.
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